Prof. Gain Kim ‘DAC/ADC-DSP-Based Wireline Transceivers for Ultra High-Speed Chip-to-Chip Interconnects

Abstract: The rapid expansion of data-driven applications such as AI, cloud computing, and hyperscale data centers imposes stringent requirements on communication bandwidth, latency, and energy efficiency. Ultra high-speed wireline transceivers form the backbone of these systems, enabling reliable and efficient data transfer across servers, accelerators, memory, and networks.

This talk will first survey key application domains, including AI clusters, disaggregated memory, PCIe interconnects, and chiplet-based processors. The importance of physical-layer signal integrity will be emphasized, as ISI, channel loss, and crosstalk degrade signals in dense packaging environments.

Equalization techniques will be introduced, including FFE, CTLE, and DFE, with a focus on design trade-offs in complexity, power, and performance. Emerging research trends toward >200 Gb/s lane data rate will be discussed, highlighting fully digital pipelines and time-interleaved ADC-DSP receivers.

Then, the talk will introduce a DAC/ADC-DSP-based transceiver and its pre-tapeout hardware verification platform. Recent research on PAM-4 SerDes DSP techniques and RFSoC-based real-time SerDes emulation platform will be introduced. Finally, wireline transceivers employing advanced modulation schemes such as discrete multitone modulation (DMT) will be introduced with measured results.

Bio: Gain Kim received the B.S., M.S., and Ph.D. degrees in Electrical Engineering from the Ecole Polytechnique Fédérale de Lausanne (EPFL), Lausanne, Switzerland in 2013, 2015, and 2018 respectively. From 2016 to 2018, he was with IBM Research Zurich, working on ADC-based wireline receiver designs. From 2018 to 2020, he was with KAIST as a postdoctoral fellow, and from Nov. 2020 to Jan. 2022 he was with Samsung Research, Seoul, South Korea, as a staff engineer working on a baseband modem for 6G wireless communications. In Jan. 2022, he joined Daegu Gyeongbuk Institute of Science & Technology (DGIST), Daegu, South Korea, where he is currently an assistant professor. His current research interests include the design of high-speed ADC, ultra-high-speed SerDes design, modulation techniques for ADC-based serial links, as well as multi-chip computing systems with energy-efficient interfaces.

Time: September 18, 2025 @ 11:00am

Place: FENS G035